Measurement of On-chip I/O Power Supply Noise and Correlation Verification between Noise Magnitude and Delay Increase due to SSO

This paper presents measurement results of on-chip noise on power and ground rings for I/O (input/output) cells in a simple test structure fabricated in 90nm process. We also show measured timings of an output signal from chip to PCB board, and examine the relation between the magnitude of I/O power supply noise and the output transition timings